datasheet

Tiny210裸机IIC之at24cxx操作

2018-10-12来源: eefocus关键字:Tiny210裸机  IIC  at24cxx操作

start.S源码:

.global _start

_start:

    ldr sp, =0xD0030000  // 初始化栈,因为后面要调用C函数 

    bl clock_init                // 初始化时钟 

    bl ddr_init                   // 初始化内存 

    bl nand_init                // 初始化NAND 

    ldr r0, =0x36000000   // 要拷贝到DDR中的位置 

    ldr r1, =0x0                 // 从NAND的0地址开始拷贝 

    ldr r2, =bss_start         // BSS段的开始地址 

    sub r2,r2,r0                  // 要拷贝的大小 

    bl nand_read              // 拷贝数据 

clean_bss:

    ldr r0, =bss_start

    ldr r1, =bss_end

    mov r3, #0

    cmp r0, r1

    ldreq pc, =on_ddr

clean_loop:

    str r3, [r0], #4

    cmp r0, r1    

    bne clean_loop        

    ldr pc, =on_ddr

on_ddr:

    mrs  r0, cpsr

    bic    r0,r0,#0x1f  // 清M4~M0 

    orr    r0,r0,#0x12

    msr    cpsr,r0        // 进入irq 

    ldr sp, =0x3e000000    // 初始化普通中断模式的栈,指向内存 

    bl irq_init

    mrs  r0, cpsr

    bic    r0,r0,#0x9f  // 开总的中断开关,清M4~M0 

    orr    r0,r0,#0x10

    msr    cpsr,r0      // 进入user mode 

    ldr sp, =0x3f000000    // 初始化用户模式的栈,指向内存 

    ldr pc, =main

halt:

    b halt    

.global key_IRQ

key_IRQ:

    sub lr, lr, #4                   // 1.计算返回地址 

    stmdb sp!, {r0-r12, lr}  // 2.保护现场 

    // 3. 处理异常 

    bl do_irq

    

    // 4. 恢复现场 

    ldmia sp!, {r0-r12, pc}^  // ^表示把spsr恢复到cpsr 

=================================================================

clock.c源码:

#define APLL_CON      (*(volatile unsigned int *)0xe0100100) 

#define CLK_SRC0      (*(volatile unsigned int *)0xe0100200) 

#define CLK_DIV0      (*(volatile unsigned int *)0xe0100300) 

#define MPLL_CON      (*(volatile unsigned int *)0xe0100108)  

void clock_init(void)

{

    // 设置时钟为:

    // ARMCLK=1000MHz, HCLKM=200MHz, HCLKD=166.75MHz

    // HCLKP =133.44MHz, PCLKM=100MHz, PCLKD=83.375MHz, 

    // PCLKP =66.7MHz

    // SDIV[2:0]  : S = 1

    // PDIV[13:8] : P = 0x3

    // MDIV[25:16]: M = 0x7d

    // LOCKED [29]: 1 = 使能锁

    // ENABLE [31]: 1 = 使能APLL控制器

    // 得出FoutAPLL = 500MHz

    APLL_CON = (1<<31)|(1<<29)|(0x7d<<16)|(0x3<<8)|(1<<0);

    

    // 时钟源的设置

    // APLL_SEL[0] :1 = FOUTAPLL

    // MPLL_SEL[4] :1 = FOUTMPLL

    // EPLL_SEL[8] :1 = FOUTEPLL

    // VPLL_SEL[12]:1 = FOUTVPLL

    // MUX_MSYS_SEL[16]:0 = SCLKAPLL

    // MUX_DSYS_SEL[20]:0 = SCLKMPLL

    // MUX_PSYS_SEL[24]:0 = SCLKMPLL

    // ONENAND_SEL [28]:1 = HCLK_DSYS

    CLK_SRC0 = (1<<28)|(1<<12)|(1<<8)|(1<<4)|(1<<0);

    

    // 设置分频系数

    // APLL_RATIO[2:0]: APLL_RATIO = 0x0

    // A2M_RATIO [6:4]: A2M_RATIO  = 0x4

    // HCLK_MSYS_RATIO[10:8]: HCLK_MSYS_RATIO = 0x4

    // PCLK_MSYS_RATIO[14:12]:PCLK_MSYS_RATIO = 0x1

    // HCLK_DSYS_RATIO[19:16]:HCLK_DSYS_RATIO = 0x3

    // PCLK_DSYS_RATIO[22:20]:PCLK_DSYS_RATIO = 0x1

    // HCLK_PSYS_RATIO[27:24]:HCLK_PSYS_RATIO = 0x4

    // PCLK_PSYS_RATIO[30:28]:PCLK_PSYS_RATIO = 0x1

    CLK_DIV0 = (0x1<<28)|(0x4<<24)|(0x1<<20)|(0x3<<16)|(0x1<<12)|(0x4<<8)|(0x4<<4);

     

    // SDIV[2:0]  : S = 1

    // PDIV[13:8] : P = 0xc

    // MDIV[25:16]: M = 0x29b

    // VSEL   [27]: 0

    // LOCKED [29]: 1 = 使能锁

    // ENABLE [31]: 1 = 使能MPLL控制器

    // 得出FoutAPLL = 667MHz

    APLL_CON = (1<<31)|(1<<29)|(0x29d<<16)|(0xc<<8)|(1<<0);

}

=====================================================================

mem_setup.S源码:

// SDRAM Controller

 

#define APB_DMC_0_BASE            0xF0000000

#define APB_DMC_1_BASE            0xF1400000

#define ASYNC_MSYS_DMC0_BASE      0xF1E00000

#define ELFIN_GPIO_BASE           0xE0200000

// MemControl    BL=4, 1Chip, DDR2 Type, dynamic self refresh, force precharge, dynamic power down off

#define DMC0_MEMCONTROL           0x00202400  

// MemConfig0    256MB config, 8 banks,Mapping Method[12:15]0:linear, 1:linterleaved, 2:Mixed  

#define DMC0_MEMCONFIG_0    0x20E00323    

#define DMC0_MEMCONFIG_1    0x00E00323    // MemConfig1

// TimingAref   7.8us*133MHz=1038(0x40E), 100MHz=780(0x30C), 20MHz=156(0x9C), 10MHz=78(0x4E)

#define DMC0_TIMINGA_REF        0x00000618      

#define DMC0_TIMING_ROW         0x2B34438A      // TimingRow    for @200MHz

#define DMC0_TIMING_DATA        0x24240000      // TimingData   CL=3

#define DMC0_TIMING_PWR         0x0BDC0343      // TimingPower

// MemControl    BL=4, 2 chip, DDR2 type, dynamic self refresh, force precharge, dynamic power down off

#define    DMC1_MEMCONTROL        0x00202400    

// MemConfig0    512MB config, 8 banks,Mapping Method[12:15]0:linear, 1:linterleaved, 2:Mixed

#define DMC1_MEMCONFIG_0    0x40F00313    

#define DMC1_MEMCONFIG_1    0x00F00313    // MemConfig1

// TimingAref   7.8us*133MHz=1038(0x40E), 100MHz=780(0x30C), 20MHz=156(0x9C), 10MHz=78(0x4E)

#define DMC1_TIMINGA_REF        0x00000618      

#define DMC1_TIMING_ROW         0x2B34438A      // TimingRow    for @200MHz

#define DMC1_TIMING_DATA        0x24240000      // TimingData   CL=3

#define DMC1_TIMING_PWR         0x0BDC0343      // TimingPower

#define MP1_0DRV_SR_OFFSET         0x3CC

#define MP1_1DRV_SR_OFFSET         0x3EC

#define MP1_2DRV_SR_OFFSET         0x40C

#define MP1_3DRV_SR_OFFSET         0x42C

#define MP1_4DRV_SR_OFFSET         0x44C

#define MP1_5DRV_SR_OFFSET         0x46C

#define MP1_6DRV_SR_OFFSET         0x48C

#define MP1_7DRV_SR_OFFSET         0x4AC

#define MP1_8DRV_SR_OFFSET         0x4CC

#define MP2_0DRV_SR_OFFSET         0x4EC

#define MP2_1DRV_SR_OFFSET         0x50C

#define MP2_2DRV_SR_OFFSET         0x52C

#define MP2_3DRV_SR_OFFSET         0x54C

#define MP2_4DRV_SR_OFFSET         0x56C

#define MP2_5DRV_SR_OFFSET         0x58C

#define MP2_6DRV_SR_OFFSET         0x5AC

#define MP2_7DRV_SR_OFFSET         0x5CC

#define MP2_8DRV_SR_OFFSET         0x5EC

#define DMC_CONCONTROL             0x00

#define DMC_MEMCONTROL             0x04

#define DMC_MEMCONFIG0             0x08

#define DMC_MEMCONFIG1             0x0C

#define DMC_DIRECTCMD             0x10

#define DMC_PRECHCONFIG         0x14

#define DMC_PHYCONTROL0         0x18

#define DMC_PHYCONTROL1         0x1C

#define DMC_RESERVED             0x20

#define DMC_PWRDNCONFIG         0x28

#define DMC_TIMINGAREF             0x30

#define DMC_TIMINGROW             0x34

#define DMC_TIMINGDATA             0x38

#define DMC_TIMINGPOWER         0x3C

#define DMC_PHYSTATUS             0x40

#define DMC_CHIP0STATUS         0x48

#define DMC_CHIP1STATUS         0x4C

#define DMC_AREFSTATUS             0x50

#define DMC_MRSTATUS             0x54

#define DMC_PHYTEST0             0x58

#define DMC_PHYTEST1             0x5C

#define DMC_QOSCONTROL0         0x60

#define DMC_QOSCONFIG0             0x64

#define DMC_QOSCONTROL1         0x68

#define DMC_QOSCONFIG1             0x6C

#define DMC_QOSCONTROL2         0x70

#define DMC_QOSCONFIG2             0x74

#define DMC_QOSCONTROL3         0x78

#define DMC_QOSCONFIG3             0x7C

#define DMC_QOSCONTROL4         0x80

#define DMC_QOSCONFIG4             0x84

#define DMC_QOSCONTROL5         0x88

#define DMC_QOSCONFIG5             0x8C

#define DMC_QOSCONTROL6         0x90

#define DMC_QOSCONFIG6             0x94

#define DMC_QOSCONTROL7         0x98

#define DMC_QOSCONFIG7             0x9C

#define DMC_QOSCONTROL8         0xA0

#define DMC_QOSCONFIG8             0xA4

#define DMC_QOSCONTROL9         0xA8

#define DMC_QOSCONFIG9             0xAC

#define DMC_QOSCONTROL10         0xB0

#define DMC_QOSCONFIG10         0xB4

#define DMC_QOSCONTROL11         0xB8

#define DMC_QOSCONFIG11         0xBC

#define DMC_QOSCONTROL12         0xC0

#define DMC_QOSCONFIG12         0xC4

#define DMC_QOSCONTROL13         0xC8

#define DMC_QOSCONFIG13         0xCC

#define DMC_QOSCONTROL14         0xD0

#define DMC_QOSCONFIG14         0xD4

#define DMC_QOSCONTROL15         0xD8

#define DMC_QOSCONFIG15         0xDC

// SDRAM Controller

 

#define APB_DMC_0_BASE            0xF0000000

#define APB_DMC_1_BASE            0xF1400000

#define ASYNC_MSYS_DMC0_BASE        0xF1E00000

#define DMC_CONCONTROL             0x00

#define DMC_MEMCONTROL             0x04

#define DMC_MEMCONFIG0             0x08

#define DMC_MEMCONFIG1             0x0C

#define DMC_DIRECTCMD             0x10

#define DMC_PRECHCONFIG         0x14

#define DMC_PHYCONTROL0         0x18

#define DMC_PHYCONTROL1         0x1C

#define DMC_RESERVED             0x20

#define DMC_PWRDNCONFIG         0x28

#define DMC_TIMINGAREF             0x30

#define DMC_TIMINGROW             0x34

#define DMC_TIMINGDATA             0x38

#define DMC_TIMINGPOWER         0x3C

#define DMC_PHYSTATUS             0x40

#define DMC_CHIP0STATUS         0x48

#define DMC_CHIP1STATUS         0x4C

#define DMC_AREFSTATUS             0x50

#define DMC_MRSTATUS             0x54

#define DMC_PHYTEST0             0x58

#define DMC_PHYTEST1             0x5C

#define DMC_QOSCONTROL0         0x60

#define DMC_QOSCONFIG0             0x64

#define DMC_QOSCONTROL1         0x68

#define DMC_QOSCONFIG1             0x6C

#define DMC_QOSCONTROL2         0x70

#define DMC_QOSCONFIG2             0x74

#define DMC_QOSCONTROL3         0x78

#define DMC_QOSCONFIG3             0x7C

#define DMC_QOSCONTROL4         0x80

#define DMC_QOSCONFIG4             0x84

#define DMC_QOSCONTROL5         0x88

#define DMC_QOSCONFIG5             0x8C

#define DMC_QOSCONTROL6         0x90

#define DMC_QOSCONFIG6             0x94

#define DMC_QOSCONTROL7         0x98

#define DMC_QOSCONFIG7             0x9C

#define DMC_QOSCONTROL8         0xA0

#define DMC_QOSCONFIG8             0xA4

#define DMC_QOSCONTROL9         0xA8

#define DMC_QOSCONFIG9             0xAC

#define DMC_QOSCONTROL10         0xB0

#define DMC_QOSCONFIG10         0xB4

#define DMC_QOSCONTROL11         0xB8

#define DMC_QOSCONFIG11         0xBC

#define DMC_QOSCONTROL12         0xC0

#define DMC_QOSCONFIG12         0xC4

#define DMC_QOSCONTROL13         0xC8

#define DMC_QOSCONFIG13         0xCC

#define DMC_QOSCONTROL14         0xD0

#define DMC_QOSCONFIG14         0xD4

#define DMC_QOSCONTROL15         0xD8

#define DMC_QOSCONFIG15         0xDC

    .globl ddr_init

ddr_init:

    // DMC0 Drive Strength (Setting 2X) 

    ldr    r0, =ELFIN_GPIO_BASE

    ldr    r1, =0x0000AAAA

    str    r1, [r0, #0x3cc]

    str    r1, [r0, #MP1_0DRV_SR_OFFSET]

    ldr    r1, =0x0000AAAA

    str    r1, [r0, #MP1_1DRV_SR_OFFSET]

    ldr    r1, =0x0000AAAA

    str    r1, [r0, #MP1_2DRV_SR_OFFSET]

    ldr    r1, =0x0000AAAA

    str    r1, [r0, #MP1_3DRV_SR_OFFSET]

    ldr    r1, =0x0000AAAA

    str    r1, [r0, #MP1_4DRV_SR_OFFSET]

    ldr    r1, =0x0000AAAA

    str    r1, [r0, #MP1_5DRV_SR_OFFSET]

    ldr    r1, =0x0000AAAA

    str    r1, [r0, #MP1_6DRV_SR_OFFSET]

    ldr    r1, =0x0000AAAA

    str    r1, [r0, #MP1_7DRV_SR_OFFSET]

    ldr    r1, =0x00002AAA

    str    r1, [r0, #MP1_8DRV_SR_OFFSET]

    // DMC0 initialization at single Type

    ldr    r0, =APB_DMC_0_BASE

    ldr    r1, =0x00101000                @PhyControl0 DLL parameter setting, manual 0x00101000

    str    r1, [r0, #DMC_PHYCONTROL0]

    ldr    r1, =0x00000086                @PhyControl1 DLL parameter setting, LPDDR/LPDDR2 Case

    str    r1, [r0, #DMC_PHYCONTROL1]

    ldr    r1, =0x00101002                @PhyControl0 DLL on

    str    r1, [r0, #DMC_PHYCONTROL0]

    ldr    r1, =0x00101003                @PhyControl0 DLL start

    str    r1, [r0, #DMC_PHYCONTROL0]

find_lock_val:

    ldr    r1, [r0, #DMC_PHYSTATUS]        @Load Phystatus register value

    and    r2, r1, #0x7

    cmp    r2, #0x7                @Loop until DLL is locked

    bne    find_lock_val

    and    r1, #0x3fc0

    mov    r2, r1, LSL #18

    orr    r2, r2, #0x100000

    orr    r2 ,r2, #0x1000

    orr    r1, r2, #0x3                @Force Value locking

    str    r1, [r0, #DMC_PHYCONTROL0]

    // setting DDR2 

    ldr    r1, =0x0FFF2010                @ConControl auto refresh off

    str    r1, [r0, #DMC_CONCONTROL]

@MemControl BL=4, 1 chip, DDR2 type, dynamic self refresh, force precharge, dynamic power down off

    ldr    r1, =DMC0_MEMCONTROL            

    str    r1, [r0, #DMC_MEMCONTROL]

@MemConfig0 256MB config, 8 banks,Mapping Method[12:15]0:linear, 1:linterleaved, 2:Mixed

    ldr    r1, =DMC0_MEMCONFIG_0            

    str    r1, [r0, #DMC_MEMCONFIG0]

    ldr    r1, =DMC0_MEMCONFIG_1            @MemConfig1

    str    r1, [r0, #DMC_MEMCONFIG1]

    ldr    r1, =0xFF000000                @PrechConfig

    str    r1, [r0, #DMC_PRECHCONFIG]

@TimingAref    7.8us*133MHz=1038(0x40E), 100MHz=780(0x30C), 20MHz=156(0x9C), 10MHz=78(0x4E)

    ldr    r1, =DMC0_TIMINGA_REF            

    str    r1, [r0, #DMC_TIMINGAREF]

    ldr    r1, =DMC0_TIMING_ROW            @TimingRow    for @200MHz

    str    r1, [r0, #DMC_TIMINGROW]

    ldr    r1, =DMC0_TIMING_DATA            @TimingData    CL=4

    str    r1, [r0, #DMC_TIMINGDATA]

    ldr    r1, =DMC0_TIMING_PWR            @TimingPower

    str    r1, [r0, #DMC_TIMINGPOWER]

    ldr    r1, =0x07000000                @DirectCmd    chip0 Deselect

    str    r1, [r0, #DMC_DIRECTCMD]

    ldr    r1, =0x01000000                @DirectCmd    chip0 PALL

    str    r1, [r0, #DMC_DIRECTCMD]

    ldr    r1, =0x00020000                @DirectCmd    chip0 EMRS2

    str    r1, [r0, #DMC_DIRECTCMD]

    ldr    r1, =0x00030000                @DirectCmd    chip0 EMRS3

    str    r1, [r0, #DMC_DIRECTCMD]

    ldr    r1, =0x00010400                @DirectCmd    chip0 EMRS1 (MEM DLL on, DQS# disable)

    str    r1, [r0, #DMC_DIRECTCMD]

    ldr    r1, =0x00000542                @DirectCmd    chip0 MRS (MEM DLL reset) CL=4, BL=4

    str    r1, [r0, #DMC_DIRECTCMD]

    ldr    r1, =0x01000000                @DirectCmd    chip0 PALL

    str    r1, [r0, #DMC_DIRECTCMD]

    ldr    r1, =0x05000000                @DirectCmd    chip0 REFA

    str    r1, [r0, #DMC_DIRECTCMD]

    ldr    r1, =0x05000000                @DirectCmd    chip0 REFA

    str    r1, [r0, #DMC_DIRECTCMD]

    ldr    r1, =0x00000442                @DirectCmd    chip0 MRS (MEM DLL unreset)

    str    r1, [r0, #DMC_DIRECTCMD]

    ldr    r1, =0x00010780                @DirectCmd    chip0 EMRS1 (OCD default)

    str    r1, [r0, #DMC_DIRECTCMD]

    ldr    r1, =0x00010400                @DirectCmd    chip0 EMRS1 (OCD exit)

    str    r1, [r0, #DMC_DIRECTCMD]

    ldr    r1, =0x07100000                @DirectCmd    chip1 Deselect

    str    r1, [r0, #DMC_DIRECTCMD]

    ldr    r1, =0x01100000                @DirectCmd    chip1 PALL

    str    r1, [r0, #DMC_DIRECTCMD]

    ldr    r1, =0x00120000                @DirectCmd    chip1 EMRS2

    str    r1, [r0, #DMC_DIRECTCMD]

    ldr    r1, =0x00130000                @DirectCmd    chip1 EMRS3

    str    r1, [r0, #DMC_DIRECTCMD]

    ldr    r1, =0x00110400                @DirectCmd    chip1 EMRS1 (MEM DLL on, DQS# disable)

    str    r1, [r0, #DMC_DIRECTCMD]

    ldr    r1, =0x00100542                @DirectCmd    chip1 MRS (MEM DLL reset) CL=4, BL=4

    str    r1, [r0, #DMC_DIRECTCMD]

    ldr    r1, =0x01100000                @DirectCmd    chip1 PALL

    str    r1, [r0, #DMC_DIRECTCMD]

    ldr    r1, =0x05100000                @DirectCmd    chip1 REFA

    str    r1, [r0, #DMC_DIRECTCMD]

    ldr    r1, =0x05100000                @DirectCmd    chip1 REFA

    str    r1, [r0, #DMC_DIRECTCMD]

    ldr    r1, =0x00100442                @DirectCmd    chip1 MRS (MEM DLL unreset)

    str    r1, [r0, #DMC_DIRECTCMD]

    ldr    r1, =0x00110780                @DirectCmd    chip1 EMRS1 (OCD default)

    str    r1, [r0, #DMC_DIRECTCMD]

    ldr    r1, =0x00110400                @DirectCmd    chip1 EMRS1 (OCD exit)

    str    r1, [r0, #DMC_DIRECTCMD]

    ldr    r1, =0x0FF02030                @ConControl    auto refresh on

    str    r1, [r0, #DMC_CONCONTROL]

    ldr    r1, =0xFFFF00FF                @PwrdnConfig

    str    r1, [r0, #DMC_PWRDNCONFIG]

@MemControl    BL=4, 1 chip, DDR2 type, dynamic self refresh, force precharge, dynamic power down off

    ldr    r1, =0x00202400                

    str    r1, [r0, #DMC_MEMCONTROL]

    mov    pc, lr

=====================================================================

nand.c源码:

#define    NFCONF  (*(volatile unsigned int *)0xB0E00000) 

#define    NFCONT  (*(volatile unsigned int *)0xB0E00004)     

#define    NFCMMD  (*(volatile unsigned char *)0xB0E00008) 

#define    NFADDR  (*(volatile unsigned char *)0xB0E0000C)

#define    NFDATA  (*(volatile unsigned char *)0xB0E00010)

#define    NFSTAT  (*(volatile unsigned int *)0xB0E00028)

#define    MP0_3CON  (*(volatile unsigned int *)0xE0200320)

#define   MP0_1CON  (*(volatile unsigned int *)0xE02002E0)

        

#define PAGE_SIZE    2048

#define NAND_SECTOR_SIZE_LP    2048

void wait_idle(void)

{

    int i;

    while(!(NFSTAT&(1<<0)));

    for(i=0; i<10; i++);

}

void nand_select_chip(void)

{

    int i;

    NFCONT &= ~(1<<1);

    for(i=0; i<10; i++);

}

void nand_deselect_chip(void)

{

    NFCONT |= (1<<1);

}

void write_cmd(int cmd)

{

    NFCMMD = cmd;

}

void write_addr(unsigned int addr)

{

    int i;

    NFADDR = (addr>>0) & 0xFF;

    wait_idle();

    NFADDR = (addr>>8) & 0x7;

    wait_idle();

    NFADDR = (addr>>11) & 0xFF;

    wait_idle();

    NFADDR = (addr>>19) & 0xFF;

    wait_idle();

    NFADDR = (addr>>27) & 0x1;

    wait_idle();

}

unsigned char read_data(void)

{

    return NFDATA;

}

static void nand_reset(void)

{

    nand_select_chip();

    write_cmd(0xff);  // 复位命令

    wait_idle();

    nand_deselect_chip();

}

void nand_init(void)

    // 设置时间参数(HCLK_PSYS = 667MHz/5 = 133MHz)

    // TACLS[15:12]: TACLS  = 1     1/133Mhz  = 7.5ns

    // TWRPH0[11:8]: TWRPH0 = 1     7.5ns * 2 = 15ns

    // TWRPH1 [7:4]: TWRPH1 = 1    7.5ns * 2 = 15ns

    // AddrCycle[1]: 1 = 指明地址周期为5次,这个是和2440的区别

    NFCONF |= 1<<12 | 1<<8 | 1<<4;

    NFCONF |= 1<<1;

    // 使能NAND控制器

    // 关闭片选信号

    NFCONT |= (1<<0)|(1<<1); 

    // 设置相应管脚用于Nand Flash控制器 

    MP0_3CON = 0x22222222;

    // 复位NAND Flash 

    nand_reset();

    return;

}

// 读ID 

void nand_read_id(char id[])

{

    int i;

    

    nand_select_chip();

    write_cmd(0x90);

    write_addr(0x00);

    for (i = 0; i < 5; i++)

        id[i] = read_data();

    nand_deselect_chip();

}

// 读一页的函数 

void nand_read(unsigned char *buf, unsigned long start_addr, int size)

{

    int i, j;

    // 选中芯片 

    nand_select_chip();

    for(i=start_addr; i < (start_addr + size);) 

    {

        // 发出READ0命令 

        write_cmd(0);

        // Write Address 

        write_addr(i);

        write_cmd(0x30);        

        wait_idle();

        for(j=0; j < NAND_SECTOR_SIZE_LP; j++, i++) 

        {

            *buf = read_data();

            buf++;

        }

    }

    // 取消片选信号 

    nand_deselect_chip();

}

void nand_write(int sdram_addr, int nand_addr, int size)

{

}

=====================================================================

uart.c源码:

#define GPA0CON      (*(volatile unsigned int *)0xE0200000) 

#define ULCON0      (*(volatile unsigned int *)0xE2900000) 

#define UCON0          (*(volatile unsigned int *)0xE2900004) 

#define UTRSTAT0      (*(volatile unsigned int *)0xE2900010)

#define UTXH0          (*(volatile unsigned char *)0xE2900020) 

#define URXH0          (*(volatile unsigned char *)0xE2900024) 

#define UBRDIV0     (*(volatile unsigned int *)0xE2900028) 

#define UDIVSLOT0      (*(volatile unsigned int *)0xE290002C)

void uart_init(void)

{

    // 设置对应GPIO用于UART0 

    GPA0CON |= 0x22;

            

    // 设置UART0寄存器 

    // bit[1:0]:0x3 = 8位数据位

    // 其他位默认,即1位停止位,无校验,正常模式 

    ULCON0 |= (0x3<<0);

    // Receive Mode [1:0]:1 = 接收采用查询或者中断模式

    // Transmit Mode[3:2]:1 = 发送采用查询或者中断模式

    // bit[6]:1 = 产生错误中断

    // bit[10]:0 = 时钟源为PCLK

    UCON0 = (1<<6)|(1<<2)|(1<<0);

    

    // 设置波特率(详细信息请参考手册或者学习日记)

    // DIV_VAL = UBRDIVn + (num of 1's in UDIVSLOTn)/16

    // DIV_VAL = (PCLK / (bps x 16)) - 1

    UBRDIV0 = 0x23;

    UDIVSLOT0 = 0x808;

    return;

}

char uart_getchar(void)

{

    char c;

    

    // 查询状态寄存器,直到有有效数据 

    while (!(UTRSTAT0 & (1<<0)));

    

    c = URXH0; // 读取接收寄存器的值 

        

    return c;

}

void uart_putchar(char c)

{

    // 查询状态寄存器,直到发送缓存为空 

    while (!(UTRSTAT0 & (1<<2)));

    

    UTXH0 = c; // 写入发送寄存器 

    

    return;

}

=====================================================================

lib.c源码:

#include "uart.h"

#define UTRSTAT0      (*(volatile unsigned int *)0xE2900010)

#define UTXH0          (*(volatile unsigned char *)0xE2900020) 

#define URXH0          (*(volatile unsigned char *)0xE2900024) 

void delay(void)

{

    volatile int i = 0x100000;

    while (i--);

}

void putchar_hex(char c)

{

    char * hex = "0123456789ABCDEF";

    

    uart_putchar(hex[(c>>4) & 0x0F]);

    uart_putchar(hex[(c>>0) & 0x0F]);

    return;

}

int putchar(int c)

{

    if(c == '\r')

    {

        while(!(UTRSTAT0&(1<<1)));

        UTXH0 = '\n';

    }

    

    if(c == '\n')

    {

        while(!(UTRSTAT0&(1<<1)));

        UTXH0 = '\r';

    }

    while(!(UTRSTAT0&(1<<1)));

    UTXH0 = c;

}

int getchar(void)

{

    int c;

    

    c = (int)uart_getchar();

    

    if (c == '\r')

        return '\n';

    

    return c;

}

int puts(const char * s)

{

    while (*s)

        putchar(*s++);

        

    return 0;

}

char * gets(char * s)

{

    char * p = s;

    while ((*p = getchar()) != '\n')

    {

        if (*p != '\b')

        {

            putchar(*p++);

        }

        else 

        {   

            if (p > s)

            {

                puts ("\b \b");

                p--;

            }     

        }       

    }

    

    *p = '\0';

    putchar('\n');

        

    return s;

}

void putint_hex(int a)

{

    putchar_hex( (a>>24) & 0xFF );

    putchar_hex( (a>>16) & 0xFF );

    putchar_hex( (a>>8) & 0xFF );

    putchar_hex( (a>>0) & 0xFF );

}

char * itoa(int a, char * buf)

{

    int num = a;

    int i = 0;

    int len = 0;

    

    do 

    {

        buf[i++] = num % 10 + '0';

        num /= 10;        

    } while (num);

    buf[i] = '\0';

    

    len = i;

    for (i = 0; i < len/2; i++)

    {

        char tmp;

        tmp = buf[i];

        buf[i] = buf[len-i-1];

        buf[len-i-1] = tmp;

    }

    

    return buf;    

}

int strcmp(const char * s1, const char * s2)

{

    while (*s1 == *s2)

    {

        if (*s1 == '\0')

            return 0;    

        s1++;

        s2++;                

    }

    

    return *s1 - *s2;

}

int atoi(char * buf)

{

    int value = 0;    

    int base = 10;

    int i = 0;

    

    if (buf[0] == '0' && buf[1] == 'x')

    {

        base = 16;

        i = 2;

    }

    

    // 123 = (1 * 10 + 2) * 10 + 3

    // 0x1F = 1 * 16 + F(15)    

    while (buf[i])

    {

        int tmp;

        

        if (buf[i] <= '9' && buf[i] >= '0') 

            tmp = buf[i] - '0';

        else

            tmp = buf[i] - 'a' + 10;

                    

        value = value * base + tmp;

        

        i++;

    }

    

    return value;

}

typedef int * va_list;

#define va_start(ap, A)        (ap = (int *)&(A) + 1)

#define va_arg(ap, T)        (*(T *)ap++)

#define va_end(ap)        ((void)0)

int wy_printf(const char * format, ...)

{

    char c;    

    va_list ap;

        

    va_start(ap, format);

    

    while ((c = *format++) != '\0')

    {

        switch (c)

        {

            case '%':

                c = *format++;

                

                switch (c)

                {

                    char ch;

                    char * p;

                    int a;

                    char buf[100];

                                    

                    case 'c':

                        ch = va_arg(ap, int);

                        putchar(ch);

                        break;

                    case 's':

                        p = va_arg(ap, char *);

                        puts(p);

                        break;                    

                    case 'x':

                        a = va_arg(ap, int);

                        putint_hex(a);

                        break;        

                    case 'd':

                        a = va_arg(ap, int);

                        itoa(a, buf);

                        puts(buf);

                        break;    

                    

                    default:

                        break;

                }                

                break;        

        

            default:

                putchar(c);

                break;

        }

    }

    

    return 0;    

}

=====================================================================

irq.c源码:

#include "lib.h"

#define VIC0INTSELECT        (*(volatile unsigned int *)0xF200000C)

#define VIC1INTSELECT        (*(volatile unsigned int *)0xF210000C)

#define VIC2INTSELECT        (*(volatile unsigned int *)0xF220000C)

#define VIC3INTSELECT        (*(volatile unsigned int *)0xF230000C)

#define VIC0INTENABLE        (*(volatile unsigned int *)0xF2000010)

#define VIC0INTENCLEAR        (*(volatile unsigned int *)0xF2000014)

#define VIC1INTENCLEAR        (*(volatile unsigned int *)0xF2100014)

#define VIC2INTENCLEAR        (*(volatile unsigned int *)0xF2200014)

#define VIC3INTENCLEAR        (*(volatile unsigned int *)0xF2300014)

#define VIC0ADDRESS          (*(volatile unsigned int *)0xF2000F00)

#define VIC1ADDRESS          (*(volatile unsigned int *)0xF2100F00)

#define VIC2ADDRESS          (*(volatile unsigned int *)0xF2200F00)

#define VIC3ADDRESS          (*(volatile unsigned int *)0xF2300F00)

#define VIC1VECTADDR14      (*(volatile unsigned int *)0xF2100138)

#define VIC1INTENABLE         (*(volatile unsigned int *)0xF2100010)

extern void key_IRQ(void);

void irq_init(void)

{

    // 设置为IRQ中断 

    VIC1INTSELECT &= ~(1<<14);

    // 使能中断(中断控制器里面的) 

    VIC1INTENABLE |= 1<<14;

    // 设置中断向量 

    VIC1VECTADDR14 = (int)key_IRQ;

}

=====================================================================

I2C.c源码:

#include "lib.h"

// GPIO 

#define GPD1CON        (*(volatile unsigned int *)0xE02000C0)

#define GPD1PUD        (*(volatile unsigned int *)0xE02000C8)

// IIC 

#define IICCON        (*(volatile unsigned int *)0xE1800000)

#define IICSTAT        (*(volatile unsigned int *)0xE1800004)

#define IICDS        (*(volatile unsigned int *)0xE180000C)

#define VIC0ADDRESS          (*(volatile unsigned int *)0xF2000F00)

#define VIC1ADDRESS          (*(volatile unsigned int *)0xF2100F00)

#define VIC2ADDRESS          (*(volatile unsigned int *)0xF2200F00)

#define VIC3ADDRESS          (*(volatile unsigned int *)0xF2300F00)

void Delay(int time);

#define WRDATA      (1)

#define RDDATA      (2)

typedef struct tI2C {

    unsigned char *pData;   // 数据缓冲区 

    volatile int DataCount; // 等待传输的数据长度 

    volatile int Status;    // 状态 

    volatile int Mode;      // 模式:读/写 

    volatile int Pt;        // pData中待传输数据的位置 

}t210_I2C, *pt210_I2C;

static t210_I2C g_t210_I2C;

void i2c_init(void)

{

    // 选择引脚功能:GPE15:IICSDA, GPE14:IICSCL 

    GPD1CON |= 0x22;

    GPD1PUD |= 0x5;

    // bit[7] = 1, 使能ACK

    // bit[6] = 0, IICCLK = PCLK/16

    // bit[5] = 1, 使能中断

    // bit[3:0] = 0xf, Tx clock = IICCLK/16

    // PCLK = 66.7MHz, IICCLK = 4.1MHz 

    IICCON = (1<<7) | (0<<6) | (1<<5) | (0xf);  // 0xaf

    IICSTAT = 0x10;     // I2C串行输出使能(Rx/Tx)

}

// 主机发送

// slvAddr : 从机地址,buf : 数据存放的缓冲区,len : 数据长度 

void i2c_write(unsigned int slvAddr, unsigned char *buf, int len)

{

    g_t210_I2C.Mode = WRDATA;   // 写操作

    g_t210_I2C.Pt   = 0;        // 索引值初始为0

    g_t210_I2C.pData = buf;     // 保存缓冲区地址

    g_t210_I2C.DataCount = len; // 传输长度

    

    IICDS   = slvAddr;

    IICSTAT = 0xf0;         // 主机发送,启动

    

    // 等待直至数据传输完毕     

    while (g_t210_I2C.DataCount != -1);

}

        

// 主机接收

// slvAddr : 从机地址,buf : 数据存放的缓冲区,len : 数据长度 

void i2c_read(unsigned int slvAddr, unsigned char *buf, int len)

{

    g_t210_I2C.Mode = RDDATA;   // 读操作

    g_t210_I2C.Pt   = -1;       // 索引值初始化为-1,表示第1个中断时不接收数据(地址中断)

    g_t210_I2C.pData = buf;     // 保存缓冲区地址

    g_t210_I2C.DataCount = len; // 传输长度

    

    IICDS        = slvAddr;

    IICSTAT      = 0xb0;    // 主机接收,启动

    

    // 等待直至数据传输完毕     

    while (g_t210_I2C.DataCount != 0);

}

//----------IIC中断服务函数----------

void do_irq(void) 

{

    unsigned int iicSt,i;

    wy_printf("do_irq \n");

    

    iicSt  = IICSTAT; 

    if(iicSt & 0x8){ wy_printf("Bus arbitration failed\n"); }

    switch (g_t210_I2C.Mode)

    {    

        case WRDATA:

        {

            if((g_t210_I2C.DataCount--) == 0)

            {

                // 下面两行用来恢复I2C操作,发出P信号

                IICSTAT = 0xd0;

                IICCON  = 0xaf;

                Delay(10000);  // 等待一段时间以便P信号已经发出

                break;    

            }

            IICDS = g_t210_I2C.pData[g_t210_I2C.Pt++];

            // 将数据写入IICDS后,需要一段时间才能出现在SDA线上

            for (i = 0; i < 10; i++);   

            IICCON = 0xaf;      // 恢复I2C传输

            break;

        }

        case RDDATA:

        {

            if (g_t210_I2C.Pt == -1)

            {

                // 这次中断是发送I2C设备地址后发生的,没有数据

                // 只接收一个数据时,不要发出ACK信号

                g_t210_I2C.Pt = 0;

                if(g_t210_I2C.DataCount == 1)

                    IICCON = 0x2f;   // 恢复I2C传输,开始接收数据,接收到数据时不发出ACK

                else 

                    IICCON = 0xaf;   // 恢复I2C传输,开始接收数据

                break;

            }

            g_t210_I2C.pData[g_t210_I2C.Pt++] = IICDS;

            g_t210_I2C.DataCount--;

            if (g_t210_I2C.DataCount == 0)

            {

                // 下面两行恢复I2C操作,发出P信号

                IICSTAT = 0x90;

                IICCON  = 0xaf;

                Delay(10000);  // 等待一段时间以便P信号已经发出

                break;    

            }      

            else

            {           

                // 接收最后一个数据时,不要发出ACK信号

                if(g_t210_I2C.DataCount == 1)

                    IICCON = 0x2f;   // 恢复I2C传输,接收到下一数据时无ACK

                else 

                    IICCON = 0xaf;   // 恢复I2C传输,接收到下一数据时发出ACK

            }

            break;

        }

        default:

            break;      

    }

    // 清中断向量

    VIC0ADDRESS = 0x0;

    VIC1ADDRESS = 0x0;

    VIC2ADDRESS = 0x0;

    VIC3ADDRESS = 0x0;

// 延时函数

void Delay(int time)

{

    for (; time > 0; time--);

}

unsigned char at24cxx_read(unsigned char address)

{

    unsigned char val;

    wy_printf("at24cxx_read address = %d\r\n", address);

    i2c_write(0xA0, &address, 1);

    wy_printf("at24cxx_read send address ok\r\n");

    i2c_read(0xA0, (unsigned char *)&val, 1);

    wy_printf("at24cxx_read get data ok\r\n");

    return val;

}

void at24cxx_write(unsigned char address, unsigned char data)

{

    unsigned char val[2];

    val[0] = address;

    val[1] = data;

    i2c_write(0xA0, val, 2);

}

===================================================================

comand.c源码:

#include "lib.h"

#include "nand.h"

#include "i2c.h"

int help(int argc, char * argv[])

{

    wy_printf("do_command 《%s》 \n", argv[0]); //实际为“<”

    wy_printf("help message: \n");

    wy_printf("md - memory dispaly\n");

    wy_printf("mw - memory write\n");

    wy_printf("nand read - nand read sdram_addr nand_addr size\n");

    wy_printf("nand write - nand write sdram_addr nand_addr size\n");

    return 0;

}

int md(int argc, char * argv[])

{    

    unsigned long *p = (unsigned long *)0;

    int i, j;

    wy_printf("do_command 《%s》 \n", argv[0]);  //实际为“<”

    if (argc <= 1) {

        wy_printf ("Usage:\n%s\n", "md address");

        return 1;

    }

    

    if (argc >= 2)

        p = (unsigned long *)atoi(argv[1]);

        

    for (j = 0; j < 16; j++)

    {    

        wy_printf("%x: ", p);

        for (i = 0; i < 4; i++)

            wy_printf("%x ", *p++);    

        wy_printf("\n");

    }

        

    return 0;

}

int mw(int argc, char * argv[])

{    

    unsigned long *p = (unsigned long *)0;

    int v = 0;

    wy_printf("do_command 《%s》 \n", argv[0]); //实际为“<”

    if (argc <= 2) {

        wy_printf ("Usage:\n%s\n", "md address data");

        return 1;

    }

    

    if (argc >= 2)

        p = (unsigned long *)atoi(argv[1]);

        

    if (argc >= 3)

        v = atoi(argv[2]);

        

    *p = v;

    

    return 0;

}

int nand(int argc, char *argv[])

{

    int nand_addr, sdram_addr;

    unsigned int size;

    

    if (argc < 5)

    {

        wy_printf("nand read sdram_addr nand_addr size\n");

        wy_printf("nand write sdram_addr nand_addr size\n");

        return 0;

    }

    sdram_addr = atoi(argv[2]);

    nand_addr = atoi(argv[3]);

    size = atoi(argv[4]);

    wy_printf("do_command 《%s》 \n", argv[0]);

    wy_printf("sdram 0x%x, nand 0x%x, size 0x%x\n", sdram_addr, nand_addr, size);

    if (strcmp(argv[1], "read") == 0)

        nand_read((unsigned char *)sdram_addr, nand_addr, size);

    if (strcmp(argv[1], "write") == 0)

        nand_write(sdram_addr, nand_addr, size);    

    wy_printf("nand %s finished!\n", argv[1]);

    return 0;

}

int i2c(int argc, char *argv[])

{

    int addr, data;

    int temp;

    addr = atoi(argv[2]);

    data = atoi(argv[3]);

    wy_printf("do_command 《%s》 \n", argv[0]); //实际为“<”

    wy_printf("addr 0x%x, data 0x%x\n", addr, data);

    if (strcmp(argv[1], "read") == 0)

    {

        temp = at24cxx_read(addr);

        wy_printf("addr 0x%x`s data 0x%x\n", addr, temp);

    }

    if (strcmp(argv[1], "write") == 0)

        at24cxx_write(addr, data);

    wy_printf("i2c %s finished!\n", argv[1]);

    return 0;

}

void run_command(int argc, char * argv[])

{

    if (strcmp(argv[0], "help") == 0)

    {

        help(argc, argv);

        return;

    }

    

    if (strcmp(argv[0], "md") == 0)

    {

        md(argc, argv);

        return;

    }

    

    if (strcmp(argv[0], "mw") == 0)

    {

        mw(argc, argv);

        return;

    }

    if (strcmp(argv[0], "i2c") == 0)

    {

        i2c(argc, argv);

        return;

    }

    if (strcmp(argv[0], "nand") == 0)

        nand(argc, argv);

    if(argc >= 1)

        wy_printf("Unknown command '%s' - try 'help' \n",argv[0]);

    return;

}

==================================================================

main.c源码:

#include "command.h"

#include "clock.h"

#include "led.h"

#include "uart.h"

#include "lib.h"

#include "nand.h"

#include "i2c.h"

#define    CFG_PROMPT        "WY_BOOT # "    // Monitor Command Prompt    

#define    CFG_CBSIZE        256        // Console I/O Buffer Size    

char *argv[10];

int readline (const char *const prompt)

{

    char console_buffer[CFG_CBSIZE];        // console I/O buffer    

    char *buf = console_buffer;

    int argc = 0;

    int state = 0;

    //puts(prompt);

    wy_printf("%s",prompt);

    gets(console_buffer);

    

    while (*buf)

    {

        if (*buf != ' ' && state == 0)

        {

            argv[argc++] = buf;

            state = 1;

        }

        

        if (*buf == ' ' && state == 1)

        {

            *buf = '\0';

            state = 0;

        }

        

        buf++;    

    }

    

    return argc;

}

void message(void)

{

    wy_printf("\nThis bootloader support some command to test peripheral:\n");

    wy_printf("Such as: LCD, IIS, BUZZER \n");

    wy_printf("Try 'help' to learn them \n\n");    

}

int main(void)

{

    char buf[6];

    int argc = 0;

    int i = 0;

    led_init(); // 设置对应管脚为输出 

    uart_init();// 初始化UART0 

    nand_read_id(buf);

    i2c_init(); // 初始化IIC 

    wy_printf("\n**********************************************************\n");

    wy_printf("                     wy_bootloader\n");

    wy_printf("                     vars: %d \n",2012);

    wy_printf("                     nand id:");

    putchar_hex(buf[0]);

    putchar_hex(buf[1]);

    putchar_hex(buf[2]);

    putchar_hex(buf[3]);

    putchar_hex(buf[4]);

    wy_printf("\n**********************************************************\n");

    while (1)

    {

        argc = readline (CFG_PROMPT);

        if(argc == 0 && i ==0)

        {

            message();

            i=1;

        }

        run_command(argc, argv);

    }

    return 0;

}

=================================================================

Makefile文件:

uart.bin:start.s main.c uart.c clock.c led.c lib.c command.c nand.c mem_setup.S irq.c i2c.c

    arm-linux-gcc -nostdlib -c start.s -o start.o

    arm-linux-gcc -nostdlib -c main.c -o main.o

    arm-linux-gcc -nostdlib -c uart.c -o uart.o

    arm-linux-gcc -nostdlib -c lib.c -o lib.o

    arm-linux-gcc -nostdlib -c clock.c -o clock.o    

    arm-linux-gcc -nostdlib -c led.c -o led.o    

    arm-linux-gcc -nostdlib -c command.c -o command.o    

    arm-linux-gcc -nostdlib -c nand.c -o nand.o    

    arm-linux-gcc -nostdlib -c irq.c -o irq.o    

    arm-linux-gcc -nostdlib -c i2c.c -o i2c.o    

    arm-linux-gcc -nostdlib -c mem_setup.S -o mem_setup.o    

    arm-linux-ld -T bootloader.lds start.o main.o uart.o lib.o clock.o led.o command.o nand.o mem_setup.o irq.o i2c.o -o uart_elf

    arm-linux-objcopy -O binary -S uart_elf uart.bin

clean:

    rm -rf *.o *.bin uart_elf *.dis

    

===================================================================

bootloader.lds链接文件:

SECTIONS {

    . = 0x36000010;

    .text : {

        * (.text)

    }

    . = ALIGN(4);

    .rodata : {

        * (.rodata)

    }

    

    . = ALIGN(4);

    .data : {

        * (.data)

    }

    . = ALIGN(4);

    bss_start = .;

    .bss  : { *(.bss)  *(COMMON) }

    bss_end = .;

}

===================================================================

因为后面的声卡程序,要用到IIC,这里就讲下IIC,用AT24LC04的EEPROM做为测试:

1.IIC总线接线图:

Tiny210裸机IIC之at24cxx操作

问:既然只有两根总线,但是上面挂接了很多的从设备,那么CPU怎么来区分它们呢?

答:通过IIC协议发出的信号,一定会先发出地址信号,从而达到区分从设备的目的。

传送出的数据的格式为:

-----------------------------------------------------------------------------------------------------------

 开始信号 | 地址(7位) | 读/写控制信号 | 应答 | 数据(8位) | 应答 | 停止信号

-----------------------------------------------------------------------------------------------------------

2.IIC协议时序图:

Tiny210裸机IIC之at24cxx操作

开始信号:

SCL为高电平时,SDA产生一个下降沿信号;

结束信号:

SCL为高电平时,SDA产生一个上升沿信号,停止信号产生在数据发送结束时;

应答信号:

在数据传送的过程当中,谁来接收数据,就由谁来的发出应答信号,即将SDA信号线拉低,应答信号产生在第9个时钟;

数据传输:

在进行数据传送的时候,数据必须是在SCL为低电平的时候,才能够发生变化,在SCL高电平的时候,数据必须保持稳定;

3.读写过程分析:

写的过程:

开始的8个CLK中进行写的操作,SDA由主机驱动,第9个CLK,SDA由从机驱动,发出应答信号;

读的过程:

开始的8个CLK中进行读的操作,SDA由从机驱动,第9个CLK,SDA由主机驱动,发出应答信号;

4.对比S5PV210和S3C2440的IIC寄存器,发现S5PV210只是多了2个IIC总线,而且要用到的寄存器,几乎无差异,所以我就不再多少什么?请大家直接阅读我提供的代码和看老大AT24CXX的裸板程序的视频吧。

1.以下是初始化函数:

void i2c_init(void)

{

    // 选择引脚功能:GPE15:IICSDA, GPE14:IICSCL 

    GPD1CON |= 0x22;

    GPD1PUD |= 0x5;

    // bit[7] = 1, 使能ACK

    // bit[6] = 0, IICCLK = PCLK/16

    // bit[5] = 1, 使能中断

    // bit[3:0] = 0xf, Tx clock = IICCLK/16

    // PCLK = 66.7MHz, IICCLK = 4.1MHz

    IICCON = (1<<7) | (0<<6) | (1<<5) | (0xf);  // 0xaf

    IICSTAT = 0x10;     // I2C串行输出使能(Rx/Tx)

}

2.在中断服务函数中,记得一定要清中断(即清中断向量地址),否则会出现只能够进入一次中断服务函数的情况,清中断的过程如下:

// 清中断向量

VIC0ADDRESS = 0x0;

VIC1ADDRESS = 0x0;

VIC2ADDRESS = 0x0;

VIC3ADDRESS = 0x0;

3.每次读或写完一次,即每次进入中断的时候,记得复位IIC总线,即清IIC控制器中的中断标志,类容如下:

IICCON = 0x2f;或者IICCON = 0xaf;

注意:

1.参考代码放在了"Tiny210学习日记_代码"目录下了,名为"13_at24cxx"。

2.测试方法:(在终端输入)

i2c read 0x0                (实现读0x0地址的操作)

i2c write 0x0 0xff            (实现往0x0地址写0xff的操作)


关键字:Tiny210裸机  IIC  at24cxx操作

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